An SRAM memory base cell is intended to contain one bit of information and is typically implemented inside a full custom structure (designed ad-hoc) built from a basic architecture to minimize some reference parameters, the most helpful of which is the area occupied.
Such a basic cell typically comprises a group of 4 N-channel. MOS transistors and 2 P-channel MOS transistors, suitably sized to implement a “ratioed logic” in which the ability to control a given signal varies according to the size of the transistor. Such a design makes it possible to ensure the correct behavior of the cell in a variety of operating conditions and to reduce the number of transistors.
An SRAM memory base cell, since it comprises a predetermined number of basic cells adjacent to one another, is actually a structure with a predetermined number of transistors in which such transistors are configured to form a feedback circuit comprising two logic inverters the outputs of which are respectively connected to the writing line and to the reading line of the data of the SRAM memory base cell, through respective pass transistors.
Currently, in the design and manufacture of integrated circuits, in which a memory base cell like the one described earlier represents one of the fundamental elements, there is a great desire to satisfy increasingly taxing requirements such as the increase in efficiency and ease of production of integrated circuits, high reliability, high regularity of design, increased performance in terms of reduction of the area occupied, flexibility of use in different applications (automotive, wireless, consumer), and so on.
Achieving each of the aforementioned desires also entails a reduction in design and manufacturing costs of such integrated circuits. A memory bank comprising SRAM memory base cells like the one described earlier represents one of the fundamental elements that can be included in an integrated circuit. Therefore, the desires indicated above also apply to the single memory base cell contained in a respective memory bank.